Author: Butkowski, L.    [Butkowski, Ł.]
Paper Title Page
WEPHA023 Co-Simulation of HDL Using Python and MATLAB Over Tcl TCP/IP Socket in Xilinx Vivado and Modelsim Tools 1127
  • Ł. Butkowski, B. Dursun, Ç. Gümüş, M.K. Karakurt
    DESY, Hamburg, Germany
  This paper presents the solution, which helps in the simulation and verification of the implementation of the Digital Signal Processing (DSP) algorithms written in hardware description language (HDL). Many vendor tools such as Xilinx ISE/Vivado or Mentor Graphics ModelSim are using Tcl as an application programming interface. The main idea of the co-simulation is to use the Tcl TCP/IP socket, which is Tcl build in feature, as the interface to the simulation tool. Over this interface the simulation is driven by the external tool. The stimulus vectors as well as the model and verification are implemented in Python or MATLAB and the data with simulator is exchanged over dedicated protocol. The tool, which was called cosimtcp, was developed in Deutsches Elektronen-Synchrotron (DESY). The tool is a set of scripts that provide a set of functions. This tool has been successfully used to verify many DSP algorithms implemented in the FPGA chips of the Low Level Radio Frequency (LLRF) and synchronization systems of the European X-Ray Free Electron Laser (E-XFEL) accelerator. Cosimtcp is an open source available tool.  
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About • paper received ※ 30 September 2019       paper accepted ※ 19 October 2019       issue date ※ 30 August 2020  
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